Key Highlights
- Broadcom has announced plans to deliver a minimum of 1 million 3D stacked chips by the end of 2027, potentially generating substantial revenue.
- The innovative technology layers two silicon components vertically, enhancing data transmission speeds while reducing power consumption by as much as 10 times.
- Fujitsu serves as the inaugural client, currently developing engineering prototypes with full-scale production scheduled for later in 2026.
- TSMC handles the manufacturing process for Fujitsu’s chip, combining its 2-nanometer technology with 5-nanometer architecture.
- The semiconductor giant intends to launch two additional stacking-based products during the latter half of 2026, with three more designs entering the sampling phase in 2027.
Broadcom ($AVGO) has established an ambitious objective to distribute no fewer than 1 million chips utilizing its advanced 3D stacking technology before 2027 concludes, based on an exclusive Reuters report released on February 26, 2026.
Harish Bharadwaj, who serves as Broadcom’s vice president of product marketing, revealed these details during a direct conversation with Reuters.
This announcement represents a tangible sales objective for a technology platform that required approximately five years of research and development investment.
The innovative approach involves placing two semiconductor chips in a vertical configuration. This close physical proximity enables faster data transfer between components while simultaneously decreasing power requirements.
According to Bharadwaj, this methodology provides approximately 10 times superior energy efficiency when compared to conventional chip architectures — a critical advantage as artificial intelligence computing demands continue expanding.
“Now, pretty much all of our customers are adopting this technology,” Bharadwaj told Reuters.
Fujitsu represents the inaugural commercial partner implementing this novel design. The Japanese technology firm is presently manufacturing engineering prototypes and has scheduled the transition to volume production for later this calendar year.
TSMC serves as the fabrication partner for Fujitsu’s semiconductor, employing its cutting-edge 2-nanometer manufacturing process while integrating it with 5-nanometer technology. This flexible approach allows clients to select different combinations of TSMC’s process nodes based on specific requirements.
Additional Products on the Horizon
Broadcom’s roadmap extends well beyond the Fujitsu collaboration. The semiconductor company anticipates releasing two more products leveraging the stacking architecture during 2026’s second half.
Three additional designs are slated to enter the sampling stage throughout 2027. Engineering teams are simultaneously developing more complex configurations featuring up to eight stacked pairs — potentially creating packages with 16 silicon layers.
The million-unit milestone encompasses the entire product portfolio utilizing this technology, rather than a single chip design.
Broadcom’s strategy within the artificial intelligence semiconductor sector focuses on collaborative custom silicon development with major technology corporations. Google relies on Broadcom for designing its Tensor Processing Units (TPUs). OpenAI has similarly partnered with Broadcom for developing proprietary processors.
Artificial Intelligence Revenue Shows Strong Growth
Broadcom forecasted its AI-related chip revenue would hit $8.2 billion during its first fiscal quarter — representing approximately double the figure from the corresponding period in the previous year.
This expansion has primarily resulted from custom semiconductor agreements with hyperscale cloud providers, where Broadcom transforms conceptual designs into manufacturable chip layouts that TSMC subsequently produces.
The 3D stacking innovation represents an additional dimension to this business model, both physically and financially.
Broadcom’s AI chip revenue was projected at $8.2 billion for Q1 fiscal 2026, doubling year-over-year.
